1. Field of the Invention
The present invention relates to a semiconductor test apparatus and a control method therefor. More particularly, the present invention relates to a semiconductor test apparatus testing a plurality of semiconductor devices at the same time and also to a control method therefor.
2. Description of Related Art
Conventionally, a semiconductor test apparatus has been known as an apparatus that variously tests a semiconductor device such as a logic IC or a semiconductor memory device before shipping. For example, a general semiconductor test apparatus that tests a semiconductor memory has a function simultaneously measuring plural devices. Thus, the general semiconductor test apparatus can input the same test data pattern waveform into the same pins of a plurality of semiconductor devices to perform a test. Since plural semiconductor memories can be measured by a small-scale resource, apparatus size does not become extremely large, thereby reducing a cost.
In case of a part of semiconductor memory devices, e.g., some flash memory, since defect area information identifying that a memory area is defective is written by a manufacturer on at least a part of the memory area (e.g., a block) including a defect cell detected by a test, this defect cell is masked. When defect area information is read from a memory area, equipment that uses the semiconductor memory device does not use the memory area.
When defect area information is written on a defect memory area of each semiconductor memory device after testing the plurality of semiconductor memory devices, since the defect area information should be input into each semiconductor memory device using an address and so on specifying a defect memory area as individual information, the defect area information cannot simultaneously be written on the plurality of semiconductor memory devices, similarly to the case of testing the above-described flash memory or the like. Thus, there has been a problem that a relief operation of writing defect area information requires time. Moreover, such a relief operation may conventionally be performed by means of a dedicated repair apparatus. However, since there is required a work for moving a semiconductor memory device, in which a defect cell is detected, from the semiconductor test apparatus to the repair apparatus, a relief operation requires longer time.